Why is my Samsung monitor not displaying?The common reason for the Samsung monitor not displaying is it's turned off, it's hibernating, or the display driver is outdated. To fix this issue, update the driver either manually or automatically. To learn how to do that, follow the steps explained in the above post.
Driver Monitor Samsung 50000 1
The built-in Microsoft Windows Update service may not update your drivers properly. Instead, use The Display / Monitor Driver Update Utility for Samsung. It is intelligent software that automatically recognizes your computer's operating system and display / monitor manufacturer and model to find the most up-to-date drivers for it. There is no risk of installing the wrong driver. The Display / Monitor Driver Update Utility downloads and installs your drivers quickly and easily.
To find the latest driver, including Windows 11 drivers, choose from our list of most popular Samsung Display / Monitor downloads or search our driver archive for the driver that fits your specific Samsung display / monitor model and your PC's operating system.
/tmp/root # dmesg grep "hdmi"[ 0.157965] samsung-hdmi-phy 32fdff00.hdmiphy: failed to get phy apb clk: -517[ 1.245659] imx-hdmi-pavi 32fc4000.hdmi-pai-pvi: No pvi clock get[ 1.894672] imx-cdnhdmi sound-hdmi: snd_soc_register_card failed (-517)[ 2.297808] samsung-hdmi-phy 32fdff00.hdmiphy: failed to get phy apb clk: -517[ 2.661089] imx-cdnhdmi sound-hdmi: snd_soc_register_card failed (-517)[ 2.680176] dwhdmi-imx 32fd8000.hdmi: Detected HDMI TX controller v2.13a with HDCP (samsung_dw_hdmi_phy2)[ 2.690962] dwhdmi-imx 32fd8000.hdmi: registered DesignWare HDMI I2C bus driver[ 2.700081] imx-drm display-subsystem: bound 32fd8000.hdmi (ops dw_hdmi_imx_ops)[ 3.095109] input: audio-hdmi HDMI Jack as /devices/platform/sound-hdmi/sound/card1/input4[ 7.448005] #1: audio-hdmi/tmp/root # dmesg grep "drm"[ 1.832519] [drm] Initialized vivante 1.0.0 20170808 for 40000000.mix_gpu_ml on minor 0[ 2.671953] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)[ 2.700081] imx-drm display-subsystem: bound 32fd8000.hdmi (ops dw_hdmi_imx_ops)[ 2.713153] [drm] Initialized imx-drm 1.0.0 20120507 for display-subsystem on minor 1[ 3.078812] imx-drm display-subsystem: [drm] fb0: imx-drmdrmfb frame buffer device
I added some debug prints in phy-fsl-samsung-hdmi.c and now I can see that the driver loads successfully, and sets a clock rate of 154000000 (successfully - samsung_hdmi_phy_clk_set_rate sets 154000000 and exits with return code 0)
dmesg grep "hdmi"[ 0.166220] samsung-hdmi-phy 32fdff00.hdmiphy: failed to get phy apb clk: -517[ 1.256890] imx-hdmi-pavi 32fc4000.hdmi-pai-pvi: No pvi clock get[ 1.948497] imx-cdnhdmi sound-hdmi: snd_soc_register_card failed (-517)[ 2.455014] samsung-hdmi-phy 32fdff00.hdmiphy: failed to get phy apb clk: -517[ 2.914482] imx-cdnhdmi sound-hdmi: snd_soc_register_card failed (-517)[ 2.921636] samsung-hdmi-phy 32fdff00.hdmiphy: [SM] got phy apb clk[ 2.927915] samsung-hdmi-phy 32fdff00.hdmiphy: [SM] got phy refclk[ 2.934103] samsung-hdmi-phy 32fdff00.hdmiphy: [SM] enabled apbclk[ 2.940367] samsung-hdmi-phy 32fdff00.hdmiphy: [SM] HDMI PHY created[ 2.946950] samsung-hdmi-phy 32fdff00.hdmiphy: [SM] clk registered[ 2.953137] samsung-hdmi-phy 32fdff00.hdmiphy: [SM] phy registered successfully[ 2.988489] dwhdmi-imx 32fd8000.hdmi: Detected HDMI TX controller v2.13a with HDCP (samsung_dw_hdmi_phy2)[ 2.999222] dwhdmi-imx 32fd8000.hdmi: registered DesignWare HDMI I2C bus driver[ 3.009568] imx-drm display-subsystem: bound 32fd8000.hdmi (ops dw_hdmi_imx_ops)[ 3.233695] samsung-hdmi-phy 32fdff00.hdmiphy: [SM] samsung_hdmi_phy_clk_set_rate: 148500000[ 3.258741] samsung-hdmi-phy 32fdff00.hdmiphy: [SM] samsung_hdmi_phy_clk_set_rate: successful
diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.cindex 5947cba737f8..eb0fb27bd027 100644--- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c+++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c@@ -931,6 +931,8 @@ static int samsung_hdmi_phy_clk_set_rate(struct clk_hw *hw,const struct phy_config *phy_cfg = samsung_phy_pll_cfg;int i;+ dev_err(samsung->dev, "[SM] samsung_hdmi_phy_clk_set_rate: %lu\n", rate);+dev_dbg(samsung->dev, "%s\n", __func__);for (; phy_cfg->clk_rate != 0; phy_cfg++)@@ -951,6 +953,8 @@ static int samsung_hdmi_phy_clk_set_rate(struct clk_hw *hw,/* Wait for PHY PLL lock */msleep(20);+ dev_err(samsung->dev, "[SM] samsung_hdmi_phy_clk_set_rate: successful\n");+return 0;}@@ -1037,6 +1041,8 @@ static int samsung_hdmi_phy_probe(struct platform_device *pdev)return ret;}+ dev_err(samsung->dev, "[SM] got phy apb clk\n");+samsung->refclk = devm_clk_get(samsung->dev, "ref");if (IS_ERR(samsung->refclk)) ret = PTR_ERR(samsung->refclk);@@ -1044,12 +1050,16 @@ static int samsung_hdmi_phy_probe(struct platform_device *pdev)return ret;+ dev_err(samsung->dev, "[SM] got phy refclk\n");+ret = clk_prepare_enable(samsung->apbclk);if (ret) dev_err(samsung->dev, "failed to enable apbclk\n");return ret;+ dev_err(samsung->dev, "[SM] enabled apbclk\n");+samsung->phy = devm_phy_create(samsung->dev, NULL, &samsung_hdmi_phy_ops);if (IS_ERR(samsung->phy)) ret = PTR_ERR(samsung->phy);@@ -1057,6 +1067,8 @@ static int samsung_hdmi_phy_probe(struct platform_device *pdev)goto phy_failed;+ dev_err(samsung->dev, "[SM] HDMI PHY created\n");+phy_set_drvdata(samsung->phy, samsung);phy_set_bus_width(samsung->phy, 8);@@ -1066,6 +1078,8 @@ static int samsung_hdmi_phy_probe(struct platform_device *pdev)goto phy_failed;}+ dev_err(samsung->dev, "[SM] clk registered\n");+phy_provider = devm_of_phy_provider_register(samsung->dev,of_phy_simple_xlate);if (IS_ERR(phy_provider)) @@ -1074,9 +1088,12 @@ static int samsung_hdmi_phy_probe(struct platform_device *pdev)goto phy_failed;+ dev_err(samsung->dev, "[SM] phy registered successfully\n");+return 0;phy_failed:+ dev_err(samsung->dev, "[SM] phy_failed\n");clk_disable_unprepare(samsung->apbclk);return ret;} 2ff7e9595c
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